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Affichage des articles dont le libellé est Electrical Engineering. Afficher tous les articles

vendredi 28 septembre 2012

Implantable Micro-Device for Epilepsy Seizure Detection and Subsequent Treatment

Salam, Muhammad Tariqus (2012)  
  Thèse de doctorat, École Polytechnique de Montréal.
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Résumé

RÉSUMÉ L’émergence des micro-dispositifs implantables est une voie prometteuse pour le traitement de troubles neurologiques. Ces systèmes biomédicaux ont été exploités comme traitements non-conventionnels sur des patients chez qui les remèdes habituels sont inefficaces. Les récents progrès qui ont été faits sur les interfaces neuronales directes ont permis aux chercheurs d’analyser l’activité EEG intracérébrale (icEEG) en temps réel pour des fins de traitements. Cette thèse présente un dispositif implantable à base de microsystèmes pouvant capter efficacement des signaux neuronaux, détecter des crises d’épilepsie et y apporter un traitement afin de l’arrêter. Les contributions principales présentées ici ont été rapportées dans cinq articles scientifiques, publiés ou acceptés pour publication dans les revues IEEE, et plusieurs autres tels que «Low Power Electronics» et «Emerging Technologies in Computing». Le microsystème proposé inclus un circuit intégré (CI) à faible consommation énergétique permettant la détection de crises d’épilepsie en temps réel. Cet CI comporte une pré-amplification initiale et un détecteur de crises d’épilepsie. Le pré-amplificateur est constitué d’une nouvelle topologie de stabilisateur d’hacheur réduisant le bruit et la puissance dissipée. Les CI fabriqués ont été testés sur des enregistrements d’icEEG provenant de sept patients épileptiques réfractaires au traitement antiépileptique. Le délai moyen de la détection d’une crise est de 13,5 secondes, soit avant le début des manifestations cliniques évidentes. La consommation totale d’énergie mesurée de cette puce est de 51 μW. Un neurostimulateur à boucle fermée (NSBF), quant à lui, détecte automatiquement les crises en se basant sur les signaux icEEG captés par des électrodes intracrâniennes et permet une rétroaction par une stimulation électrique au même endroit afin d’interrompre ces crises. La puce de détection de crises et le stimulateur électrique à base sur FPGA ont été assemblés à des électrodes afin de compléter la prothèse proposée. Ce NSBF a été validé en utilisant des enregistrements d’icEEG de dix patients souffrant d’épilepsie réfractaire. Les résultats révèlent une performance excellente pour la détection précoce de crises et pour l’auto-déclenchement subséquent d’une stimulation électrique. La consommation énergétique totale du NSBF est de 16 mW. Une autre alternative à la stimulation électrique est l’injection locale de médicaments, un traitement prometteur de l’épilepsie. Un système local de livraison de médicament basé sur un nouveau détecteur asynchrone des crises est présenté.

ABSTRACT 
Emerging implantable microdevices hold great promise for the treatment of patients with neurological conditions. These biomedical systems have been exploited as unconventional treatment for the conventionally untreatable patients. Recent progress in brain-machine-interface activities has led the researchers to analyze the intracerebral EEG (icEEG) recording in real-time and deliver subsequent treatments. We present in this thesis a long-term safe and reliable low-power microsystem-based implantable device to perform efficient neural signal recording, seizure detection and subsequent treatment for epilepsy. The main contributions presented in this thesis are reported in five journal manuscripts, published or accepted for publication in IEEE Journals, and many others such as Low Power Electronics, and Emerging Technologies in Computing. The proposed microsystem includes a low-power integrated circuit (IC) intended for real-time epileptic seizure detection. This IC integrates a front-end preamplifier and epileptic seizure detector. The preamplifier is based on a new chopper stabilizer topology that reduces noise and power dissipation. The fabricated IC was tested using icEEG recordings from seven patients with drug-resistant epilepsy. The average seizure detection delay was 13.5 sec, well before the onset of clinical manifestations. The measured total power consumption of this chip is 51 µW. A closed-loop neurostimulator (CLNS) is next introduced, which is dedicated to automatically detect seizure based on icEEG recordings from intracranial electrode contacts and provide an electrical stimulation feedback to the same contacts in order to disrupt these seizures. The seizure detector chip and a dedicated FPGA-based electrical stimulator were assembled together with common recording electrodes to complete the proposed prosthesis. This CLNS was validated offline using recording from ten patients with refractory epilepsy, and showed excellent performance for early detection of seizures and subsequent self-triggering electrical stimulation. Total power consumption of the CLNS is 16 mW. Alternatively, focal drug injection is the promising treatment for epilepsy. A responsive focal drug delivery system based on a new asynchronous seizure detector is also presented. The later system with data-dependent computation reduces up to 49% power consumption compared to the previous synchronous neurostimulator.

Design and Architecture of a Hardware Platform to Support the Development of an Avionic Network Prototype

Trentin, Davide (2012) 
Mémoire de maîtrise, École Polytechnique de Montréal.
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Résumé

Résumé en français La récente évolution des architectures des systèmes avioniques a permis la création de réseaux avioniques modulaire embarqués (IMA) et l’augmentation du nombre de systèmes embarqués numériques dans chaque avion. Cette transition vers une nouvelle génération d’avions plus électriques permet une réduction du poids et de la consommation énergétique des aéronefs et aussi des couts de production et d’entretien. Pour atteindre une réduction du poids encore plus poussée et une amélioration de la bande passante des réseaux utilisés, des technologies innovatrices ont récemment été adoptées : ARINC 825 et AFDX qui permettent en fait une réduction du câblage nécessaire pour réaliser le réseau embarqué.Dans le cadre du projet AVIO 402, qui inclus plusieurs sujets de recherche qui concernent aussi les capteurs et leur interface avec le système IMA, une nouvelle architecture a été proposée pour la réalisation du réseau utilisé pour le système de contrôle de vol. Cette architecture est basée sur des bus ARINC 825 locaux, connectés entre eux en utilisant un réseau AFDX qui offre une meilleure bande passante ; les ponts entre les deux protocoles et les modules qui connectent les nœuds au réseau ont une structure générique pour supporter des protocoles différents et aussi plusieurs types des capteurs et actionneurs. Pour une évaluation des performances et une analyse des défis de son implémentation, la réalisation d’un prototype du réseau proposé est requise par le projet. Dans ce mémoire, le développement d’une plateforme matérielle pour soutenir la réalisation de ce prototype est traité et trois modules fondamentaux du prototype ont été conçus sous forme de "IP core" pour être subséquemment intégrés dans l’architecture du réseau qui sera implémenté en utilisant des FPGA. Les trois systèmes sont le contrôleur du bus CAN, utilisé comme base pour l’implémentation du protocole ARINC 825, le "End System" AFDX et le commutateur nécessaires pour la réalisation d’un réseau AFDX. Dans la première partie de ce mémoire, les objectifs visés sont présentés et une analyse des spécifications des protocoles considérés est fournie, cela permet d’identifier les fonctionnalités qui doivent être incluses dans chaque système et de déterminer si des solutions pour leur implémentation ont déjà été publiées et peuvent être réutilisées. Ensuite, le développement de chaque système est présenté et les choix de conception sont expliqués afin de montrer comment les fonctionnalités requises par les spécifications des deux protocoles peuvent être implémentées pour mieux répondre aux nécessités du projet AVIO 402.

 Abstract
  The objective of the present project is to design three modules for a hardware platform that will support the implementation of an avionic network prototype based on the FPGA technology. The considered network has been conceived to reduce cabling weight and to improve the available bandwidth, and it exploits the recently introduced ARINC 825 and AFDX protocols. In order to support the implementation of both these protocols, a CAN bus controller, an AFDX End System, and an AFDX Switch have been designed. After an extensive review of the existing literature about the two related avionic protocols, a study of the existing solutions for CAN and Ethernet protocols, on which they are based, has been done as well to identify what knowledge and technology could be reused. Because they are very similar, a flexible CAN controller has been implemented in hardware instead of an ARINC 825 one in order to support both these technologies and in order to reduce the IP core size. A combined HW/SW approach has been preferred for the AFDX End System architecture to leverage an existing UDP/IP protocol stack and the Ethernet layer included in the Linux kernel has been modified to create a portable and configurable implementation of AFDX. Since various problems have been encountered to reproduce an ARINC 653 compliant environment on the embedded system, the suggested design has been ported in a PC. Finally, an original solution for the implementation of the AFDX switch fabric has been finally presented; a space-division switching architecture has been chosen and tailored to meet the AFDX specification. Hardware parallelism is exploited to reduce the latency introduced on each frame by filtering them concurrently. Input buffers have been duplicated to separate high from low priority traffics, further reducing latency of critical frames and creating a redundancy that reduce the possibility of packet loss. Packet scheduling and double queuing guarantee that all critical frames are forwarded before low priority ones.Keywords: Avionic Full-Duplex Switched Ethernet, AFDX, ARINC 664, ARINC 825, CAN, Avionic Data Networks, Ethernet Switch, FPGA.

Multiphase Short-Circuit Analysis Solver in Phase Domain Using a Modified-Augmented-Nodal Analysis Approach


Dispersion Engineered Real-Time Analog Signal Processing Components and Systems

Gupta, Shulabh (2012) Dispersion Engineered Real-Time Analog Signal Processing Components and Systems. Thèse de doctorat, École Polytechnique de Montréal.
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Résumé

Résumé Avec la demande croissante pour une plus grande efficacité d’utilisation du spectre de fréquences et l’émergence de systèmes à bande ultra large (UWB) qui en découle, l’analyse d’environnements RF en temps réel est devenue d’une importance capitale. Traditionnellement, ceci est fait en utilisant des techniques d’analyse des signaux en temps réel basées soit sur une approche digitale, soit sur une approche analogique. Les appareils digitaux sont plus attrayants aux basses fréquences à cause de leur grande flexibilité, de leur taille compacte, de leur faible coût et de leur grande fiabilité. Par contre, aux plus hautes fréquences, notamment aux fréquences micro-ondes, les appareils digitaux ont des problèmes fondamentaux tels des performances faibles, un coût élevé des convertisseurs A/D et D/A et une consommation de puissance excessive. À ces fréquences, des appareils et systèmes analogiques sont requis pour des applications d’analyse des signaux en temps réel. À cause de leur mode d’opération fondamentalement analogique, ces systèmes sont appel´es analyseurs analogiques de signaux, et l’opération qu’ils effectuent est appelée analyse analogique de signaux (ASP). Cette thèse présente les plus récentes avancées au niveau des ASP. Le concept d’ASP est introduit au chapitre 1. La contribution de cette thèse au domaine des ASP est également présentée au chapitre 1. Le cœur d’un analyseur analogique de signaux en temps réel est une structure de délai dispersive (DDS). Dans une structure dispersive, la vélocité de groupe vg est une fonction de la fréquence, ce qui cause une dépendance en fréquence du délai de groupe. Par conséquent, un signal à large bande qui se propage le long d’une telle structure est sujet à un espacement dans le temps puisque ses différentes composantes spectrales voyagent avec différentes vitesses de groupes, et sont donc réarrangées dans le temps. En exploitant ce réarrangement temporel, les différentes composantes spectrales d’un signal à large bande peuvent être directement transposées dans le domaine temporel et peuvent alors être analysées en temps réel pour diverses applications. Ce concept, qui constitue le fondement des techniques ASP, est décrit au chapitre 2. En se basant sur ces principes de dispersion, le présent travail contribue au développement de nouveaux systèmes et composantes ASP ainsi qu’au développement de nouvelles DDS

Abstract
 With the ever increasing demand on higher spectral efficiencies and the related emergence of ultra-wideband (UWB) systems, monitoring RF environments in real-time has become of paramount interest. This is traditionally done using real-time signal processing techniques based on either digital or analog approaches. Digital devices are most attractive at low frequencies due to their high flexibility, compact size, low cost, and strong reliability. However, at higher frequencies, such as millimeter-wave frequencies, digital devices suffer of fundamental issues, such as poor performance, high cost for A/D and D/A converters, and excessive power consumption. At such frequencies, analog devices and systems are required for real-time signal processing applications. Owing to their fundamentally analog mode of operation, these systems are referred to as Analog Signal Processors, and the operation as Analog Signal Processing (ASP). This dissertation presents the most recent advances in these ASP concepts which are introduced in Chapter 1 along with the contribution of this thesis in this domain. The core of an analog real-time signal processor is a dispersive delay structure (DDS). In a dispersive structure, the group velocity vg is a function of frequency, which results in a frequency-dependent group delay. Consequently, a wide-band signal traveling along such a structure experiences time spreading, since its different spectral components travel with different group velocities and are therefore temporally rearranged. By exploiting this temporal rearrangement, the various spectral components of a wideband signal can be directly mapped onto time domain and can then be processed in real-time for various applications. This concept is described in Chapter 2 which forms the background of ASP techniques. Based on these dispersion principles, this work contributes to the development of novel ASP systems and devices along with the developments of novel DDSs. Two types of DDSs are used in this work: a) Composite Right/Left-Handed (CRLH) transmission lines (TL), and b) all-pass dispersive structures. In particular, the all-pass dispersive delay networks are investigated in greater details based on C-section all-pass networks in various configurations along with novel synthesis procedures and electromagnetic analysis to synthesize arbitrary group delay responses of the DDSs.

Innovations en microfabrication pour la production de circuits à très hautes fréquences et ajustables

Daigle, Maxime (2012) Innovations en microfabrication pour la production de circuits à très hautes fréquences et ajustables. Thèse de doctorat, École Polytechnique de Montréal.
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Résumé

RÉSUMÉ Au cours des dernières années, deux tendances importantes dans le domaine des micro-ondes ont été l’augmentation de la fréquence d’opération et l’intégration de plusieurs fonctionnalités dans un même dispositif. Ces changements ont généré des défis nouveaux, principalement liés à l’utilisation d’éléments ajustables intégrés et à la difficulté de fabrication de circuits dont les dimensions critiques sont très fines. Deux pistes de solution sont présentées dans cette thèse : le recours à des éléments ajustables à base de matériaux ferroélectriques intégrés au substrat et l’utilisation d’un procédé de fabrication innovateur à base de pâtes photoimageables mises en forme en couches épaisses pour la fabrication de circuits en trois dimensions. Le matériau ferroélectrique choisi est le titanate de baryum et strontium, noté BaxSr1-xTiO3, ou plus simplement BST. Comme tous les ferroélectriques, sa permittivité varie en fonction d’un champ électrique externe appliqué. Pour déposer ce matériau, la pulvérisation RF est utilisée. L’analyse par diffraction rayons X confirme la nature cristalline des couches minces de BST, alors qu’une mesure par rétrodiffusion de Rutherford semble indiquer une légère déviation par rapport à la stœchiométrie prévue. Une lacune en titane est identifiée comme étant la source probable de cette variation. En ajoutant du titane comme dopant diffusé dans la couche de BST, ses propriétés électriques se trouvent améliorées pour des concentrations de titane excédentaire de 2-5 % en volume. Les couches minces de BST optimisées présentent une ajustabilité de 35 % sous un potentiel de 20 V. Pour réaliser ces mesures, des condensateurs à plaques parallèles sont utilisés. La dépendance de la tangente des pertes en fonction du champ appliqué est aussi mise en évidence. Une fois les couches minces de BST suffisamment performantes, un déphaseur variable est conçu et fabriqué. Ce déphaseur prend la forme d’un filtre passe-bas en technologie de guides coplanaires chargé de condensateurs ajustables en parallèle. Le déphaseur variable présente une figure de mérite de 36 º/dB avec un potentiel d’activation de 20 V, ce qui le place en milieu de peloton pour la figure de mérite, mais parmi les premiers pour le potentiel utilisé. Toutefois, un grand déplacement de la fréquence d’opération indique que les propriétés électriques du BST changent en variant l’épaisseur du dépôt. Les pâtes photoimageables permettent des résolutions latérales d’environ 20 µm et des épaisseurs du même ordre.
 
ABSTRACT 
In recent years, the microwave field has seen two important trends: the increase in the operation frequency and the integration of several functions in one device. These changes have brought new challenges, mainly related to the use of integrated tunable elements and fabrication problems caused by the increasingly small critical dimensions required for high frequency operation. Two possible solutions are presented in this thesis: the use of ferroelectric-based adjustable elements integrated onto the substrate and the fabrication of three dimensional circuits using an innovative manufacturing process called photoimageable thick films. The ferroelectric material chosen is barium and strontium titanate noted BaxSr1-xTiO3, or simply BST. As all ferroelectrics, its permittivity can be changed by applying an external electric field. RF sputtering is used to deposit this material. X-ray diffraction analysis confirms the crystalline nature of the BST thin films while a measurement by Rutherford backscattering spectroscopy suggests a slight deviation from the expected stoichiometry. A titanium deficiency is identified as the likely source of this variation. The addition of titanium as a dopant diffused into the BST film is shown to have important impact on its electrical properties. Optimum concentration of titanium dopant is determined to be 2-5% by volume. The optimized BST thin films have an adjustability of 35% with a potential of 20 V. To achieve these measures, parallel plate capacitors are used. The dependence of the tangent loss as a function of the applied field is also highlighted. Once BST thin films demonstrate satisfactory performances, a variable phase shifter is designed and fabricated. This phase shifter is implemented as a low-pass filter in coplanar guides technology loaded with adjustable capacitors. The variable phase shifter has a figure of merit of 36 °/dB with an activation potential of 20 V, which places it in the midfield for the figure of merit, but among the first for the small potential used. However, a large shift in the operating frequency indicates that the electrical properties of BST are thickness dependant. Photoimageable pastes allow lateral resolutions of about 20 microns and thicknesses of the same order. Since this process is multi-layered in nature, it is suitable for the realization of millimeter wave circuits of complex geometry, such as waveguides. This approach has been explored by only one research group to this day. However, these materials were not designed for use with high frequency, so it is necessary to characterize their microwave properties.

Étude d'un déphaseur large bande en technologie de guide d'ondes intégré au substrat

Boudreau, Israël (2012) Étude d'un déphaseur large bande en technologie de guide d'ondes intégré au substrat. Mémoire de maîtrise, École Polytechnique de Montréal.
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Résumé

 L’électronique est un domaine en émergence depuis plus de 60 ans. En effet, depuis que le premier transistor a vu le jour un peu avant les années 50, la complexité des circuits n’a cessé d’augmenter. Cependant, il n’y a pas que les circuits intégrés qui se complexifient et évoluent dans ce domaine. Les supports des circuits intégrés, soit les « PCBs » ce qui signifie « Printed Circuits Boards » ou en français « circuits imprimés » sont tout aussi importants lors de la conception d’un système électronique. Ils font bien sûr l’interconnexion entre les circuits intégrés, mais aussi souvent une bonne partie du traitement hyperfréquence (filtres, déphaseurs, antennes). Lorsqu’un grand facteur de qualité est requis, il n’est plus possible d’utiliser des lignes de transmission. Il faut alors utiliser des guides d’ondes. Ces guides sont généralement très performants, mais sont aussi coûteux et difficiles à intégrer. Une nouvelle classe de ces guides, les guides d’ondes intégrés au substrat (ou en anglais « Substrate Integrated Waveguide »), a vu le jour il y a un peu plus de dix ans. Ces derniers ont l’avantage, comme leur nom l’indique, d’être intégrés directement dans le substrat, ou le circuit imprimé. L’utilisation de ceux-ci permet de diminuer les coûts de production et le poids. Du même coup, nous augmentons la densité de composants tout en obtenant un excellent facteur de qualité. Il est alors très intéressant de concevoir le plus de circuits possible en utilisant ce guide d’ondes. Le présent document détaille l’analyse complète d’un nouveau type de déphaseur large bande utilisant la technologie de guides d’ondes intégrés au substrat. La méthode de déphasage proposée consiste à placer une tranche d’un diélectrique au centre de la structure. Ainsi, en comparant avec un guide de même dimension, mais sans cette perturbation, il est possible de mesurer une différence de phase. L’objectif de ce mémoire est de développer les outils nécessaires à l’étude de différentes configurations de déphaseurs. L’objectif final est d’étudier plusieurs formes de tranche afin de trouver celle qui donne les meilleurs résultats en termes de pertes d’insertion et de déphasage.


ABSTRACT
  Electronic is an emerging field since the 60’s. Indeed, from the day that the first transistor has been manufactured, a little bit before the 50’s, the complexity of electronic circuits didn’t stop increasing. Nevertheless, there are others fields than integrated circuits that become more complex in this area. The «PCB» or «Printed Circuit Board», the component that supports the ICs, is as important as the integrated circuits during the fabrication process of an electronic system. It interconnects the integrated circuits together but also has to process a great part of the microwave signals (filters, phase shifters, antennas).When a large quality factor is required, it is not possible to use transmission lines. Waveguides have to be used. These guides are usually very efficient but are very expensive and difficult to integrate. A new class of waveguides, the Substrate Integrated Waveguides (SIW), was proposed more than ten years ago. As seen in their name, these guides have the advantage to be integrated directly into the substrate, or into the PCBs. This technology reduces the production costs and the weight. At the same time, it increases the components density while providing an excellent quality factor. It is then interesting to use a lot of SIW in the integration of microwave systems. This document presents the complete analysis of a new kind of broadband phase shifters designed with the SIW. The proposed method to realize the phase shift consists of a dielectric slab placed in the middle of the structure. Thus, by comparing the phase shift of this waveguide with another having the same dimensions but without this perturbation, a phase difference can be observed. The objective of this project is to develop the required tools to study different phase shifter configurations. The final goal is to study some forms of slot to find the optimal which gives the best results in term of insertion loss and phase shift.To simplify the theoretical analysis, a SIW can be replaced by an equivalent rectangular waveguide.

DIFFAMC: Un mécanisme de différenciation de fiabilité pour un canal sans fil utilisant l'AMC

Ben Guedria, Sami (2012) DIFFAMC: Un mécanisme de différenciation de fiabilité pour un canal sans fil utilisant l'AMC. Mémoire de maîtrise, École Polytechnique de Montréal.
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RÉSUMÉ

 De nos jours, les technologies sans fil sont omniprésentes dans notre quotidien. Les nouveaux standards de 4ieme générations, WiMAX et LTE, offrent un niveau de performance comparable à celui des réseaux filaires. Les nouveaux terminaux mobiles sont désormais capables de gérer pratiquement tous les types d'applications. En effet, ils permettent non seulement d'avoir des communications téléphoniques, mais aussi de naviguer sur internet, de regarder des vidéos, de faire de la vidéo-conférence, de jouer en ligne, de partager les fichiers, etc. Par ailleurs, l'utilisation des terminaux mobiles ne se limite plus à une utilisation personnelle. Désormais, de plus en plus d'entreprises équipent leurs employés de téléphones intelligents. En effet, les téléphones sont devenus un outil de travail offrant la mobilité et l'accès à l'information temps réel. Les systèmes de communication modernes doivent gérer non seulement plusieurs types d'applications, mais aussi plusieurs types d'utilisateurs. Par conséquent, tous les standards offrent de nombreuses classes de qualité de service (QoS) capables de satisfaire les contraintes imposées par les applications. Néanmoins, aucun standard n'a prévu le support de la différenciation de fiabilité (DiR) afin d'offrir à chaque utilisateur le niveau de fiabilité adéquat. En fait, ils offrent tous un niveau de fiabilité unique. La différenciation de fiabilité est d'autant plus mportante dans un contexte sans fil. En effet, le canal sans fil est sujet à la variation de la qualité du signal reçu, qui résulte de la mobilité de l'utilisateur et du phénomène multitrajet. Cette variation de la qualité du canal entraîne souvent des erreurs de transmission. Pour de l'utilisateur, ces erreurs se traduisent couramment par des coupures lors des communications téléphoniques, des pertes de l'image et du son dans le cas de la vidéo et un débit très bas pour les données. Ces erreurs sont aussi souvent la cause de la perte de la communication. Bien qu'un utilisateur normal puisse aisément tolérer de petites pertes de signal, un professionnel serait moins enclin à accepter cela. La différenciation de fiabilité permet d'offrir exactement à chaque utilisateur du réseau sans fil le niveau de fiabilité dont il a besoin.



ABSTRACT

Nowadays, wireless technologies are constantly present in our everyday life. Moreover, fourth-generation standards (WiMAX and LTE) are capable of providing the same level of performance as wired networks. Mobile devices are now able to manage almost every kind of application. In fact, besides calling, it is now possible to surf the Internet, watch videos, play online, share files, make video-conference calls and so forth. Furthermore, mobile device usage is no longer limited to personal purposes. What is more, an increasing number of enterprises currently provide its employees with smartphones. Indeed, mobile phones are nowadays a business tool which offers mobility and real time access to information. Modern communication systems have to manage not only different kinds of applications but different kinds of users. Therefore, standards are now offering numerous classes of Quality of Service (QoS) to satisfy applications constraints. Nevertheless, none of these standards were planned to support Differentiated Reliability (DiR) which offers users different levels of reliability. In fact, they all offer a single level of reliability. Differentiated reliability is as important in a wireless context as QoS. In effect, wireless channels are subject to quality variation of the received signal due to user mobility and multiple path phenomenon. In fact, variations of channel quality frequently cause transmission errors. In consequence, users suffer from poor call quality, loss of image and sound in the case of video and low throughput for data transmissions. Moreover, these errors are also the cause for most missed communications. Even though most users can tolerate small losses of signal, a business user would be less willing to accept it. Differentiated reliability makes possible the allocation of the level of reliability that each user of a wireless network needs. In this Master thesis, we introduce DiffAMC; a novel mechanism of differentiated reliability in wireless systems. DiffAMC is an innovative manner of using Adaptive Modulation and Coding technique (AMC), to offer different levels of reliability. AMC is a transmissions technique which is widely used in most recent wireless communication standards. As far as we know, DiffAMC is the sole mechanism that uses AMC to obtain differentiation. Besides, DiffAMC was developed to be easily integrated in every communication system that uses AMC.







































        

mardi 25 septembre 2012

A CMOS QPSK Demodulator Frontend for GPON

Authors: Chen, Fei
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Keywords: frontend
QPSK demodulation
GPON
CMOS
VCO
mixer
Issue Date: 2010
Series/Report no.: Canadian theses
Abstract: This thesis examines the design of a QPSK demodulator frontend for GPON transceiver at end user's side. Since lowering the cost of the terminal transceivers in an access network like GPON is a key requirement, CMOS technology is used and several area-saving design techniques are applied. The designed frontend circuit saved more than 80% area of the key components like the mixers and the QVCO than some published designs which can also fit the application. A measurement in frequency domain and a simulation in time domain verified that this frontend is able to demodulate a QPSK signal with a data rate as high as 5 Gbit/s. Two structures of quadrature oscillators are firstly presented and compared. One is an LC QVCO centered at 5 GHz, which has a tuning range of 3 GHz, a phase noise of -100.8 dBc/Hz at 1 MHz offset, and an area of 0.15 mm2 excluding pads. The other is a ring QVCO which only takes an area of 0.019 mm2. But it has a higher phase noise of -81 dBc/Hz at 1 MHz offset. Then two broadband mixers are described separately. The first one provides a high conversion gain, but its input linearity is insufficient to meet the input power requirement. The second mixer obtains required input linearity but with a trade-off of conversion gain. Both mixers have a broadband input impedance match from 2 GHz to 8 GHz. The first mixer has a conversion gain of 8.5 dB and an input 1 dB compresion point at -17 dBm. The second mixer has a conversion gain of -7 dB with an on-chip buffer or -2.1 dB without buffer, but an input 1 dB compresion point at -5 dBm. A frontend circuit is lastly presented. It integrates the compact ring QVCO, two broadband mixers with high input linearity, and two second-order LC ladder low pass filters. A Frequency domain measurement shows the expected spectrum down conversion of a 2.5 Gsym/s QPSK signal centered at 5 GHz. The whole frontend circuit including pads takes 1 mm2 area, and consumed 157 mW power.

vendredi 21 septembre 2012

Simulation and Speed Control of Induction Motor Drives

Bhatia, Amitpal Singh I. S. and Gupta, Vinit Kumar and Sethi, Sourav Anand (2012) Simulation and Speed Control of Induction Motor
Drives.
BTech thesis.
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Abstract

Induction motors are the most widely used electrical motors due to their reliability, low cost and robustness. However, induction motors do not inherently have the capability of variable speed operation. Due to this reason, earlier dc motors were applied in most of the electrical drives. But the recent developments in speed control methods of the induction motor have led to their large scale use in almost all electrical drives.
Out of the several methods of speed control of an induction such as pole changing, frequency variation, variable rotor resistance, variable stator voltage, constant V/f control, slip recovery method etc., the closed loop constant V/f speed control method is most widely used. In this method, the V/f ratio is kept constant which in turn maintains the magnetizing flux constant so that the maximum torque remains unchanged. Thus, the motor is completely utilized in this method.
During starting of an induction motor, the stator resistance and the motor inductance (both rotor and stator) must be kept low to reduce the steady state time and also to reduce the jerks during starting. On the other hand, higher value of rotor resistance leads to lesser jerks while having no effect on the steady state time.
The vector control analysis of an induction motor allows the decoupled analysis where the torque and the flux components can be independently controlled (just as in dc motor). This makes the analysis easier than the per phase equivalent circuit.

Modelling of breakdown voltage of white minilex paper in the presence of voids under AC and DC conditions using fuzzy logic techniques

Behera, Sunil and Patnaik, Sarthak (2012) Modelling of breakdown voltage of white minilex paper in the presence of voids under AC and DC conditions using fuzzy logic techniques. BTech thesis.
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687Kb

Abstract

Gaseous cavities present in the insulation materials can lead to continuous deterioration and eventually breakdown of insulation materials. To determine the stability of use and to acquire the data for the modeling and designing of electrical insulation systems ,breakdown voltage (BDV) of the insulation should be determined. In this paper, Fuzzy Logic (FL) method is used to model breakdown voltages of White minilex paper samples based on experimental data generated in the laboratory. Different models are proposed with different membership functions for the FL under both dc and ac voltage conditions. The cavities are created artificially. Low values of mean absolute errors of the estimated breakdown voltage of the test data show the efficiency of the models.

Cascaded Multilevel Inverter Based Transformerless Traction Drive for Railway Applications

Behera, Minakhi (2012) Cascaded Multilevel Inverter Based Transformerless Traction Drive for Railway Applications. MTech thesis.
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2118Kb

Abstract

Electric Railway Traction Drive has been introduced as a solution to the environmental problem caused by the diesel or steam engines. Generally, an AC electrified railway system is supplied with 25kV, 50 Hz AC supply. It is fed to the traction motor after stepping down to three phase, 400 V, 50Hz with the help of a transformer. This magnetically coupled transformer lead to high weight, several losses and reduced efficiency. The railway electric traction requires high voltage operation. This is achieved with the help of multilevel inverter. Among the various multilevel inverters, the cascaded multilevel inverter is best suited for railway traction application because of its modular structure and use of low rating devices. The three phase induction motors are widely used in the railway traction drive because of its low cost and weight, better torque characteristics, high reliability and less maintenance due to the absence of brushes. This thesis presents the application of the cascaded multilevel inverter in the transformerless railway traction drive. Cascaded inverters up to eleven level have been simulated to find that THD increases with the increase in the voltage level. Various modulation techniques- Phase Shifted Modulation, Level Shifted Modulation and Selective Harmonic Elimination techniques were implemented in the multilevel inverters to find out the best modulation techniques among them. It was found that SHE technique resulted in low THD. Thus, an IGBT based-cascaded eleven level inverter with SHE method has been modelled to lower the supply voltage to a level convenient for the traction induction motors. This eliminates the need of a transformer in the railway traction drives and also results in the reduction in the Total Harmonic Distortion of the voltage to be supplied to the traction motors.

Voltage to Frequency Converter: Modeling and Design

Behera, Jyoti Ranjan and Barik, Rajesh Kumar (2012) Voltage to Frequency Converter: Modeling and Design. BTech thesis.
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1905Kb

Abstract

In this thesis a study on conventional voltage to frequency converter is given. A linear voltage to frequency converter is assumed i.e. the output frequency level changes with the varying input voltage level. Then as per the findings of our study a voltage to frequency converter is designed and a physical model of the designed circuit is prepared. A transformer and full wave rectifier are used to reach the optimal dc voltage level while the regulator is used for controlled power supply. An op-Amp based voltage to frequency converter is designed whose output is obtained through a 555 timer. The main operation of the op-Amp is to serve as a voltage integrator which is necessary for triangular wave generation and also as a comparator for converting the triangular wave into square wave. The timer circuit is operated in monostable mode. A simple and low cost voltage to frequency converter design and its performance analysis is the main objective of this thesis.

Power Quality Improvement using Shunt Hybrid Power Filter

Barai, Mili (2012) Power Quality Improvement using Shunt Hybrid Power Filter. MTech thesis.
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1536Kb

Abstract

This project report presents design, simulation and development of passive shunt filter and shunt hybrid power filter (SHPF) for mitigation of the power quality problem at ac mains in ac-dc power supply feeding to a nonlinear load. The power filter is consisting of a shunt passive filter connected in series with an active power filter. At first passive filter has been designed to compensate harmonics. The drawback associated with the passive filter like fixed compensation characteristics and resonance problem is tried to solve by SHPF. Simulations for a typical distribution system with a shunt hybrid power filter have been carried out to validate the presented analysis. Harmonic contents of the source current has been calculated and compared for the different cases to demonstrate the influence of harmonic extraction circuit on the harmonic compensation characteristic of the shunt hybrid power filter.

Power quality improvement using passive shunt filter, TCR and TSC combination

Badi, Manjulata (2012) Power quality improvement using passive shunt filter, TCR and TSC combination. MTech thesis.
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1110Kb

Abstract

Power system harmonics are a menace to electric power systems with disastrous consequences. The line current harmonics cause increase in losses, instability, and also voltage distortion. With the proliferation of the power electronics converters and increased use of magnetic, power lines have become highly polluted. Both passive and active filters have been used near harmonic producing loads or at the point of common coupling to block current harmonics. Shunt filters still dominate the harmonic compensation at medium/high voltage level, whereas active filters have
been proclaimed for low/medium voltage ratings. With diverse applications involving reactive power together with harmonic compensation, passive filters are found suitable [41]. Passive filtering has been preferred for harmonic compensation in distribution systems due to low cost,
simplicity, reliability, and control less operation [42].
The uncontrolled ac-dc converter suffers from operating problems of poor power factor, injection of harmonics into the ac mains, variations in dc link voltage of input ac supply, equipment overheating due to harmonic current absorption, voltage distortion due to the voltage drop caused by harmonic currents flowing through system impedances, interference on telephone and communication line etc. The circuit topologies such as passive filters, ac-dc converter, based improved power quality ac-dc converters are designed, modeled and implemented. The main emphasis of this investigation has been on a compactness of configurations, simplicity in control, reduction in rating of components, thus finally leading to saving in overall cost. Based on thesis considerations, a wide range of configurations of power quality mitigators are developed, which is expected to provide detailed exposure to design engineers to choose a particular configuration for a specific application under the given constraints of economy and desired performance. For bidirectional power flow applications, the current source converter is designed and simulated with R-L load.
The necessary modeling and simulations are carried out in MATLAB environment using SIMULINK and power system block set toolboxes. The behavior of different configurations of
passive tuned filters on power quality is studied. One of the way out to resolve the issue of reactive power would be using filters and TCR, TSC with combination in the power system.
Installing a filter for nonlinear loads connected in power system would help in reducing the harmonic effect. The filters are widely used for reduction of harmonics. With the increase of nonlinear loads in the power system, more and more filters are required. The combinations of passive filters with TCR and TSC are also designed and analyzed to improve the power quality at ac mains. This scheme has resulted in improved power quality with overall reduced rating of passive components used in front end ac-dc converters with R-L load.

Study Of Grid Connected Induction Generator for wind Power Applications

Ayenampudi, Praveen Varma and Kothuri, Bala Chakri (2012) Study Of Grid Connected Induction Generator for wind Power Applications. BTech thesis.
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1778Kb

Abstract

Over the past few decades, there has been an increasing use of induction generator particularly in wind power applications. In generator operation, a prime mover (turbine, engine) drives the rotor above the synchronous speed. Stator flux still induces currents in the rotor, but since the opposing rotor flux is now cutting the stator coils, active current is produced in stator coils, and motor now operates as a generator, and sends power back to the electrical grid. Based on the source of reactive power induction generators can be classified into two types namely standalone generator and Grid connected induction generator. In case of standalone IGs the magnetizing flux is established by a capacitor bank connected to the machine and in case of grid connection it draws magnetizing current from the grid.

This project explicitly deals with the study of grid connected induction generators where frequency and voltage of the machine will be dictated by the electric grid. Among these types of IGs, Doubly Fed Induction Generator (DFIG) wind turbines are nowadays increasingly used in large wind farms because of their ability to supply power at constant voltage and frequency. Modern control techniques such as Vector control and MFC (magnitude and frequency control) are studied and some of proposed systems are simulated in MATLAB-SIMULINK environment.